1. Field of the Invention
The present invention relates to a phase shifter.
2. Description of the Related Art
A phase shifter described below is disclosed in Japanese Unexamined Patent Application Publication No. 2001-196804, for example. That is to say, the phase shifter according to Japanese Unexamined Patent Application Publication No. 2001-196804 comprises an outer conductor, and two inner conductors stored inside of the outer conductor, wherein the two inner conductors comprise two fixed inner conductors connected to two terminals respectively, and a variable inner conductor having a configuration folded back in the shape of a U, which is slidably configured while securing high-frequency connection with the fixed inner conductor. However, the phase shifter according to Japanese Unexamined Patent Application Publication No. 2001-196804 mechanically changes impedance by sliding the fixed inner conductor, and accordingly providing a low-speed operation.
Also, with the first embodiment of Japanese Unexamined Patent Application Publication No. 7-99425, a phase shifter as shown in FIG. 27 is disclosed. The phase shifter 2000 shown in FIG. 27 includes an SPDT (Single Pole Double Throw) switch 2001, an LPF (Low Pass Filter) 2002 connected with the SPDT switch 2001 through a terminal 2006, an HPF (High Pass Filter) 2003 connected with the SPDT switch 2001 through a terminal 2007, an SPDT 2004 connected with the LPF 2002 through a terminal 2008, and the HPF 2003 through a terminal 2009, having an output terminal 2010.
The circuit diagram of the LPF 2002 included in the phase shifter 2000 is shown in FIG. 28. The LPF 2002 shown in FIG. 28 includes inductors L271 and L272, a capacitor C271, resistances R271 through R273, FETs (Field Effect Transistors) F271 through F273, and a gate bias terminal 2011. Note that the terminals 2006 and 2008 are the same as those shown in FIG. 27. The source of the FET F271 is connected to the terminal 2006, the drain thereof is connected to the inductor L271, and the gate thereof is connected to the gate bias terminal 2011 via the resistance R271. One end of the inductor L271 is connected to the drain of the FET F271, and the other end thereof is connected to the inductor L272 and the capacitor C271. One end of the inductor L272 is connected to the inductor L271 and the capacitor C271, and the other end thereof is connected to the source of the FET F272. One end of the capacitor C271 is connected to the inductor L271 and the inductor L272, and the other end thereof is connected to the source of the FET F273. The gate of the FET F273 is connected to the gate bias terminal 2011 via the resistance R273, and the drain thereof is grounded. The gate of the FET F272 is connected to the gate bias terminal 2011 via the resistance R272, and the drain thereof is connected to the terminal 2008.
First, description will be made regarding the operations of the LPF 2002, prior to description of the operations of the phase shifter 2000. The FETs F271 through F273 are controlled in common by the voltage of the gate bias terminal 2011. In other words, the FETs F271 through F273 are in either an all-on or an all-off state.
FIG. 29A illustrates an LPF 2002a which is an equivalent circuit of the LPF 2002 when the FETs F271 through F273 are all on. In a case that the FETs F271 through F273 are in an all-on state, ideally, the FETs F271 through F273 can be simplified with an equivalent circuit thereof. Accordingly, the LPF 2002a includes the inductors L271 and L272, and the capacitor C271. Here, the inductors L271 through L272 are serially connected between the terminal 2006 and the terminal 2008. Also, one end of the capacitor C271 is connected to a node between the inductors L271 and L272, and the other end thereof is grounded. Note that the inductors L271 and L272 and the capacitor C271 are the same as those shown in FIG. 28, and the terminals 2006 and 2008 are the same as those shown in FIG. 27. The reactance unit of the LPF 2002a comprises the inductors L271 and L272, and the susceptance unit comprises the capacitor C271 alone.
FIG. 29B illustrates the LPF 2002b which is an equivalent circuit of the LPF 2002 when the FETs F271 and F273 are all off. In a case that the FETs F271 through F273 are all off, it can be considered that the FETs are a capacitor having a specific capacity, and accordingly, the FETs are represented by a capacitor in the equivalent circuit. In FIG. 29B, the LPF 2002b includes inductors L271 and L272, the capacitor C271, and the capacitors F271a through F273a. Note that the inductors L271 and L272, and the capacitor C271 are the same as those shown in FIG. 28, the capacitors F271a through F273a correspond to the FETs F271 through F273 shown in FIG. 28, and the terminals 2006 and 2008 are the same as those shown in FIG. 27. Here, the capacitor F271a, the inductors L271 and L272, and the capacitor F272a are serially connected between the terminals 2006 and 2008, in that order. Also, one end of the capacitor C271 is connected to a node between the inductors L271 and L272, and the other end thereof is connected to the capacitor F273a. One end of the capacitor F273a is connected to the capacitor C271, and the other end thereof is grounded. The reactance unit of the LPF 2002b comprises the inductors L271 and L272, and the capacitors F271a and F272a, and the susceptance unit comprises the capacitor C271 and the capacitor F273a. 
Next, the LPF 2002a shown in FIG. 29A will be compared with the LPF 2002b shown in FIG. 29B. The reactance unit of the LPF 2002b is configured by adding the capacitors F271a and F272a corresponding to the FETs F271 and F272 to the reactance unit of the LPF 2002a. The susceptance unit of the LPF 2002b is configured by adding the capacitor F273a corresponding to the FET F273 to the susceptance unit of the LPF 2002a. Thus, the standardization reactance between the LPFs 2002a and 2002b and the standardization susceptance between the LPFs 2002a and 2002b are both different. Two different amounts of phase shift of the LPF 2002 can be obtained by generating two different states wherein both the standardization reactance and the standardization susceptance are different by switching operations of the FETs. Though not shown in the drawing, FETs are included in the HPF 2003 shown in FIG. 27, two different amount of phase shift are obtained by switching operations of the FETs in the same way as with the LPF 2002. The amount of phase shift of the phase shifter 2000 is determined by the amount of phase shift of the LPF 2002 and the amount of phase shift of the HPF 2003, and different amounts of phase shift of the entire phase shifter 2000 can be obtained by switching operations of the FETs. For example, with the first embodiment in Japanese Unexamined Patent Application Publication No. 7-99425, description is made wherein a single phase shifter 2000 can realize switching of 45° and 90° by designing component devices such that the two amounts of phase shift obtained by the LPF 2002 are −67.5° and −22.5°, and the two amounts of phase shift obtained by the HPF 2003 are 22.5° and 67.5°. However, the amount of phase shift obtained by this phase shifter 2000 cannot be continuously changed due to discreteness thereof.
Moreover, with the second embodiment in Japanese Unexamined Patent Application Publication No. 7-99425, a phase shifter as shown in FIG. 30 is disclosed. The phase shifter 3000 shown in FIG. 30 includes the LPF 3001 and the HPF 3002 connected to an input terminal 3003 and an output terminal 3004. In other words, the LPF 3001 and the HPF 3002 are in parallel with each other.
The LPF 3001 includes inductors L291 and L292, and variable capacitance devices C291 through C293. The variable-capacity C291, the inductors L291 and L292, and the variable capacitance device C292 are serially connected between the input terminal 3003 and the output terminal 3004, in that order. Moreover, one end of the variable capacitance device C293 is connected to a node between the inductors L291 and L292, and the other end thereof is grounded.
The HPF 3002 includes the inductor L293, and the variable capacitance devices C294 through C296. The variable capacitance devices C294 and C295 are serially connected between the input terminal 3003 and the output terminal 3004, in that order. Moreover, one end of the inductor L293 is connected to a node between the variable capacitance devices C294 and C295, and the other end thereof is connected to the variable capacitance device C296. One end of the variable capacitance device C296 is connected to the inductor L293, and the other end thereof is grounded.
The principle of operations for the phase shifter 3000 shown in FIG. 30 will be described with reference to FIG. 31. In FIG. 31, wherein the amount of phase shift is represented by the central angle of a circle, and a signal component is represented by the vector extending in the circumferential direction from the center of the circle. In FIG. 31, a signal component 3010 represents a signal component passing through the LPF 3001 when the amount of passing phase shift of the LPF 3001 is −45°, and a signal component 3011 represents a signal component passing through the HPF 3002 when the amount of passing phase shift of the HPF 3002 is 45°. FIG. 31 illustrates that the amount of passing phase shift θ of the phase shifter 3000 can be obtained by vector synthesis of the signal component 3010 and the signal component 3011. That is to say, the amount of passing phase shift θ of the phase shifter 3000 is determined by changing the input/output impedance of the LPF 3001 and the HPF 3002 and performing vector synthesis without changing the amount of phase shift of the LPF 3001 and the HPF 3002. Note that the input/output impedance of the LPF 3001 and the HPF 3002 is adjusted so as to keep the input/output impedance of the phase shifter 3000 50 Ω. The desired amount of phase shift can be obtained in a specific range determined by the amount of phase shift of the LPF 3001 and the HPF 3002, and the signal components 3010 and 3011 using the above-described principal of operation. Detailed description will be made later.
Furthermore, Japanese Unexamined Patent Application Publication No. 11-168354, discloses a phase shifter as follows. That is to say, an arrangement has been made wherein in a case that an inductor or a capacitor is connected between the drain and the source of two FETs, and on voltage is applied to the gates of the FETs, the signal input from the drain of the FET is output from the source thereof without any change, on the other hand, in a case that a pinch-off voltage is applied to the gates of the FETs, the FETs go off, and the input signal passes through the inductor or the capacitor. The phase shifter disclosed in Japanese Unexamined Patent Application Publication No. 11-168354 changes 4 types of passing phase by combination of the on/off state of the two FETs. However, this change is a discrete change, and the amount of phase shift is not changed continuously.
Furthermore, with Japanese Unexamined Patent Application Publication No. 2000-315902, a phase shifter as follows is disclosed. That is to say, this phase shifter includes a conductor path for a high-frequency signal is formed on a first ceramic substrate, a metal film serving as a ground face formed on a second ceramic substrate, and a liquid crystal/resin complex comprising resin and liquid crystal scattered in this resin, which are disposed between both the substrates while the conductor path and the metal film facing each other. Though the phase shifter disclosed in Japanese Unexamined. Patent Application Publication No. 2000-315902 changes the dielectric constant of the liquid crystal/resin complex by control voltage so as to change the amount of phase shift, there is the difficulty that control voltage is high.
Furthermore, with U.S. Pat. No. 4,837,532, a phase shifter shown in FIG. 32 is disclosed. The phase shifter 4000 according to U.S. Pat. No. 4,837,532 has a configuration wherein multiple unit elements, each made up of a variable capacitance device with one end connected to a node of two inductors serially connected and the other end grounded, are serially connected. That is to say, as shown in FIG. 32, a section S-1 which is a unit element connected to an input terminal Q0, a section S-2 connected to the section S-1 through a node Q1, and so on through a section S-n connected to the section S-(n−1) (not shown) and an output terminal Qn, are included in the present phase shifter. With the first section S-1 which is a unit element, an inductor L1a and an inductor L1b are serially connected between the input terminal Q0 and the node Q1, one end of a variable capacitance device C1 is connected to a node of the inductors L1a and L1b, and the other end the variable capacitance device C1 is grounded. In the same way, with the second section S-2 of which is a unit element, an inductor L2a and an inductor L2b are serially connected between the nodes Q1 and Q2, one end of a variable capacitance device C2 is connected to a node of the inductors L2a and L2b, and the other end the variable capacitance device C2 is grounded. With the final section S-n which is a unit element, an inductor Lna and an inductor Lnb are serially connected between the node Q (n−1) (not shown) and the output terminal Qn, one end of a variable capacitance device Cn is connected to a node of the inductors Lna and Lnb, and the other end the variable capacitance device Cn is grounded. Note that the phase shifter 4000 further includes an bias inductor L311, and a bias capacitor C311, wherein the bias inductor L311 and the bias capacitor C311 are sequentially connected between the output terminal Qn and the ground, and the node between the bias inductor L311 and the bias capacitor C311 serves as a bias voltage input terminal 4003.
More specifically, inductances of respective inductors Lia and Lib (i is an integer 1 through n) are the same, and are each represented by L/2. The capacitance of each variable capacitance device Ci is equally adjusted, and is represented by C. At this time, characteristic impedance Z0 is represented as the following expression. In other words, the characteristic impedance Z0 is a function of capacitance C of the variable capacitance device Ci. However, the characteristic impedance varies since only the dominator within the root varies.
                                          Z            0                    ⁡                      (            C            )                          =                                            L              C                        -                                          ω                2                            ⁢                                                L                  2                                4                                                                        (        1        )            
Variance of the characteristic impedance causes impedance-mismatching, leading to a passing loss of the phase shifter due to reflection, and accordingly no variance is preferable. U.S. Pat. No. 4,837,532 discloses that in a case that the phase shifter is configured of a unit element of the first section alone, there is the need to change the capacitance of the variable capacitance device C1 greatly, so that the characteristic impedance varies widely, consequently increasing impedance-mismatching, however, employing multiple sections can reduce the adjustment level for capacitance of the variable capacitance device Ci in each unit element, thereby preventing impedance-mismatching. Ideally, the closer to infinity the number of sections is, the closer to zero the passing loss is, however, in reality, the number of sections is limited, and accordingly, a certain amount of passing loss remains. Thus, transmission efficiency deteriorates.
FIG. 1 illustrates an antenna application known to the Inventor. The example of the antenna application shown in FIG. 1 is a smart antenna comprising an array antenna block 11 formed on a semiconductor substrate 14, a millimeter wave circuit block 12, and a logical circuit block 13. The array antenna block 11 includes multiple antennas 11a. The configuration of each of the antennas 11a is shown in FIG. 2. With the antenna 11a, a receiving unit 21, an attenuator A21, and a phase shifter S21 are serially connected, in that order. An signal received by the receiving unit 21 is attenuated at the attenuator A21, the amount of phase shift thereof is adjusted by the phase shifter S21, and the adjusted signal is output to a signal synthesizing unit 22 within the millimeter wave circuit block 12 shown in FIG. 1. The signal synthesizing unit 22 synthesizes input signals of all the antennas on the array antenna block 11, and outputs the synthesized signal to an unshown demodulator within the millimeter wave circuit block 12, for example.
With the antenna application as shown in FIG. 1, though conditions such as low-voltage driving, continuous variation of phase shift, and high-speed variation of phase shift are required, none of the phase shifters disclosed in the above-described Japanese Unexamined Patent Application Publication Nos. 2001-196804, 7-99425, 11-168354, and 2000-315902 satisfy all these conditions. While the phase shifter 4000 according to U.S. Pat. No. 4,837,532 realizes all these conditions, transmission efficiency deteriorates due to the variance of the characteristic impedance accompanied with the above-described variance of the amount of phase shift.